Position:
Validation Tech
Location: Austin, TX
Duration: 12-18 months
USC or GCs
are highly encouraged to apply
Job Description:
Look for
someone with VCS (which is a Synopsis verification tool for test benches,
assertions, etc.)
Verilog,
and I’ll bet my life System Verilog (since this is a validation/verification
role and because they are asking for OVM too)
C/C++
OVM
Validation of TNG emulation FW through test cases.
Defines and develops system validation environment and test suites. Uses emulation and simulation-level tools and techniques to ensure functionality to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures.
Validation of TNG emulation FW through test cases.
Defines and develops system validation environment and test suites. Uses emulation and simulation-level tools and techniques to ensure functionality to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures.
Amit | Social Media
Analyst and IT
Recruiter |
www.sulaan.com
Amit@sulaan.com | 480.626.0604 (work) | 480.452.1970 (fax) |
Amit@sulaan.com | 480.626.0604 (work) | 480.452.1970 (fax) |
Consulting | Staffing | Outsourcing