Position: IAG VERIFICATION ENGINEER
Location: Portland,
OR
Duration: 6 -18
months
USC or GCs are
encouraged to apply
Job Description:
4-6 years of experience in pre-silicon verification of digital design
Creates test plans for RTL validation.
Develops pre-Silicon functional validation tests to verify system will meet design requirements.
Develops and analyzes coverage monitors, checkers.
Runs functional simulations and debugs failures to rootcause.
Maintaining and enhancing validation infrastruture by creating new tools to support validation.
Creates test plans for RTL validation.
Develops pre-Silicon functional validation tests to verify system will meet design requirements.
Develops and analyzes coverage monitors, checkers.
Runs functional simulations and debugs failures to rootcause.
Maintaining and enhancing validation infrastruture by creating new tools to support validation.
Must skills:
Systemverilog for verification, OVM.
Scripting language Perl.
Knowledge of DDR4/LPDDR4 protocol.
Systemverilog for verification, OVM.
Scripting language Perl.
Knowledge of DDR4/LPDDR4 protocol.
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visit our blog www.sulaanjobs.blogspot.com
Sulaan Solutions, Inc.
Consulting | Staffing | Outsourcing